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OK.
Good morning.

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In the last lecture I did a
little demonstration for you

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where I showed you a pair of
inverters.

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And showed you that the output
of the first inverter looked

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weird, certainly not like
anything we have seen thus far.

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It looked like a slow rising
transition like this.

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And using that motivation we
have begun our study of RC

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circuits.
And in particular for today the

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lecture is titled "Digital
Circuit Speed".

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We are going to look at the
fundamentals of digital circuit

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speed.
And it all boils down to an RC

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delay.
By the end of the lecture,

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I am going to show you two
numbers that you can look at a

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circuit and obtain by
observation, multiply them out

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and you will get a good idea of
the speed at which a circuit

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will run.
It is pretty amazing.

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So as a quick review --
The relevant section for this

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is Chapter 10.4.
As a review,

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we said to understand things
like this we need to develop the

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foundations for RC circuits.
And the example I covered was

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that of a very simple circuit
that looked like this --

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An RC circuit of this form.
And I also showed you that for

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an input of the form,
input that steps from zero to

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VI at time T equal to zero.
And assuming that the capacitor

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state at time T equals zero was
zero.

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What this means is that the
capacitor starts from rest,

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so at time T=0,
oops, this is VI,

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I'm sorry.
So we assume that the capacitor

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starts from rest.
At time T=0 I apply a VI step,

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capital VI.
And then I want to look at how

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the voltage across the capacitor
behaves.

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And we did a bunch of analysis.
And at the end of the day,

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in the final demo in the
lecture last time I showed you

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that the capacitor would behave
like this.

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It would start off at,
oops.

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I am sorry.
This should be,

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let's assume that started off
at VO.

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We get a different equation for
zero.

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So let's say the capacitor
started off at VO,

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in which case VC at time T=0 is
VO as expected.

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And we showed that the output
would look something like this.

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After a long period of time
this would come up to VI and

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this rise had a time constant of
tau=RC.

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So we wrote the equation for
this waveform.

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And this is the case when VI is
greater than VO.

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I would like you to stare at
the circuit and this result here

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to get more intuition on what is
going on.

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At time T=0,
VC starts off at VO as expected

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because I am telling you that is
the case, that is initial

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condition.
It starts off at VO.

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Then this one steps to VI.
There is no infinite transition

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anywhere here,
and so the capacitor holds its

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voltage at VO,
at time T=0.

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And then the VI here,
which is greater than VO,

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begins to charge the capacitor
up, charge it through this

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resistor.
And so therefore the capacitor

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charges up.
After a long period of time,

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from the basic foundations of
capacitors, we know that the

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capacitor appears like a
long-term open circuit to DC.

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This is a DC voltage VI.
So it appears like an open

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circuit.
So after a long period of time

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VI appears at the end.
And from here to here I have an

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exponential rise that is
typified by an equation of the

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form -t/RC.
This kind of waveform rising

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from a smaller value to a higher
value is typified by this

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expression.
We saw the expression when we

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developed the equations last
time.

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On the other hand,
if the input was such that VI

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was smaller than VO,
so let's say VI was smaller

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than VO then what will happen is
that the capacitor voltage would

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start off at VO,
because I am telling you that

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is the initial condition,
and would then decay in this

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manner to the final value of VI
which is the input.

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Instead of going up this way it
decays down to the final value

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applied to the circuit.
Again, the time constant is RC.

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But this is typified by a form,
this is exponential rise and

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this guy e^-t/RC is an
exponential decay.

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The key thing to remember is
that when you have RC circuits

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of this form,
the waveforms that you get are

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either each of the e^-t/RC or
1-e^-t/RC.

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So you can now begin to see how
waveforms such as that come

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about.
We will do an example and sit

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down and compute the inverter
delay.

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And notice that this waveform
here is very typical or

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corresponds to this waveform
that we see here.

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Here I am starting at VO.
And assuming this axis starts

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off at zero, this one starts
very close to zero and then

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rises up to some final value.
So far I have reviewed some

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material for you that I covered
the last time.

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As a second step,
I would like to give you a much

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more intuitive approach --
-- that doesn't involve solving

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any differential equations.
And the reason I do this is

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that most experienced circuit
designers do not sit down and

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write differential equations
each time they see an RC

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circuit.
When you are starting out and

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you see an RC circuit,
you say node method and you

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write the differential equation,
but experienced people don't do

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that.
They look at it and they can

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sketch the waveform out by
inspection.

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And I will show you how to do
that.

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It is indeed incredibly simple
once I give you some intuition.

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Throughout the rest of this
course, I will be showing you

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many such examples where
initially I develop the

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foundations of stuff and then
show you an intuitive approach

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that very quickly lets you
either get the final answer or

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at least sanity check the answer
that you have gotten.

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And this is how experienced
circuit designers deal with

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stuff.
How many people here have seen

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this movie Bend it Like Beckham?
So you know this Beckham

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character doesn't think about
how he is going to curve the

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ball.
He just does it and it happens.

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He doesn't sit down writing
differential equations to find

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out the projectile trajectory
and all of that stuff.

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You just kind of do it.
These series of intuitions I am

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going to give you is going to be
in line with the Bend it Like

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Beckham kind of intuition.
And this one in particular I

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would like to do in honor of one
of your recitation instructions

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Professor David Perreault.
And so this piece of intuition

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is going to be termed "Practice
it Like Perreault".

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Watch what I do with the other
names.

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Professor David Perreault is
really a world expert in

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designing really incredible
power supplies for very,

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very small chips and so on.
He doesn't start writing

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differential equations to do
this stuff.

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He looks at it and sketches it
out.

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Let me show you how he would do
this.

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Suppose I have my circuit like
before, VI, R and C,

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and I am telling you that
VC(0)=VO.

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And my input VI is a step that
looks like this.

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VI is a step.
How would Professor Perreault

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do this?
Let's do it completely by

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intuition.
No math here.

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All right.
We know that I have told you

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that this guy starts off at VO.
I am telling you that.

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You know it is going to start
at VO.

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And there is no impulse or huge
infinite transition,

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and so the capacitor starts off
at VO.

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We also know from basic
capacitor properties that after

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a long period of time,
in the steady state,

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this is but a DC voltage.
If you apply a DC and here is

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my capacitor.
After a long period of time

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this guy is going to look like
an open circuit.

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It is going to charge up to
some value and then is going to

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look like an open circuit.
Because if it didn't,

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you would keep charging it and
its voltage would keep

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increasing.
That doesn't happen,

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it looks like an open circuit.
So it looks like an open

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circuit in the long run.
The voltage across it must be

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capital VI.
If I don't have current flowing

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in the circuit then the only way
that can happen is --

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This open circuit.
Capital VI appears across the

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capacitor.
Well, after a long period of

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time I know that the output must
look like this.

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In this case,
I have assumed VI is greater

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than VO.
So you have two points of your

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curve, VO and VI after a long
period of time.

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And, as I told you earlier,
with capacitors you get two

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kinds of curves.
Two things.

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What you do is go zoop.
There you go.

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You're done.
And this has an exponential

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rise.
This is with the form

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1-e^-t/RC.
So we can write an equation for

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that as follows.
VC we know has something to do

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with minus t/RC.
This is of that form,

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so there has to be that term in
there somewhere.

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And I start off with VO.
At time T=0 this is one and

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this is one, so this term
becomes a zero.

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At time T=0 that becomes a zero
so I get VO here.

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I am going to make sure this
stuff stays zero at time T=0,

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so I start off with VO.
Now, as time wears on what

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happens here?
This voltage here,

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VI-VO, if you look at this
difference.

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That is exponentially decaying
over time.

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And so therefore all I have to
do here is write VI-VO.

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There is the answer.
I know the form of the curve.

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I am just fitting an expression
that meets this form.

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This starts off at VO.
When time T=0 this second

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expression is zero and so it is
VO.

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And this difference here decays
down to zero.

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And this difference here,
VI-VO is multiplied by this

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term here and that is what I
get.

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And you can confirm this.
At time T=0 this is zero.

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At time T infinity this goes to
zero, this goes to zero leaving

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a one, and VO and minus VO
cancel and I get a VI.

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Virtually any such simple
voltage source,

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current source,
resistor, capacitor,

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circuit for most inputs like
steps and so on can be analyzed

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in this manner.
Initial value,

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final value,
it's simple.

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And just to show you that this
is simple, I am going to label

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this expression this way.
It is of the form 1-e^-t/RC.

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Just remember that.
Now, by the same token,

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what if VI had been smaller
than VO?

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Then that is simple,
too.

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I would have had my VI being
here.

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VI would have been here.
And that is of the form.

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In this particular situation,
here is my VI,

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my starting value and I do
this.

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And just to label that,
let me label that this way.

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I just told you that for RC
circuits you go this way or you

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go this way.
So it is down here.

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I get some kind of an
exponential decay.

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And, like before,
think of this one.

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This one has VI as a base value
here.

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And the difference between the
two is VO minus VI.

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And that difference decays.
So I have a VI out here,

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and this difference decays so I
get VO-VI and that decays in

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this form.
So I get an exponential decay

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of this difference here.
Just stare at it for a while

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longer.
You should be able to just go

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and knock it off like this,
just like Professor Perreault

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would.
No differential equations.

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Just write it down by looking
at the curve.

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Let's keep these two in mind,
OK, these forms?

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One is the 1-e^-t/RC form and
the e^-t/RC.

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Both have a time constant RC.
Let me just make this a dashed

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line just to be on the safe side
here.

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That is our first piece of
intuition.

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And, as I pointed out before,
in problems you face in life or

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in ones that we give you,
feel free to use the intuitive

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method.
Or what you can do is apply the

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mathematical method and then
check your answer by using your

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intuition.
What I would like to do next is

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apply what you have learned so
far to figure out what we set

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out to figure out,
which is the delay of my

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inverter.
I had promised you that by the

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end of this lecture I was going
to close the loop on that little

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demo.
I was going to close the loop

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for you on this little circuit
that we had looked at,

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one inverter driving another
inverter.

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This was A, this was inverter
X, and this was my node B.

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The green curve you see out
there, the middle one has a

233
00:17:26,000 --> 00:17:31,000
transition shown up there.
And what I am going to do next

234
00:17:31,000 --> 00:17:35,000
is use the results we have
gotten so far to compute a

235
00:17:35,000 --> 00:17:39,000
number.
We are going to compute a delay

236
00:17:39,000 --> 00:17:42,000
number both for a rising
transition.

237
00:17:42,000 --> 00:17:46,000
We will call that delay DR for
rising transition.

238
00:17:46,000 --> 00:17:51,000
And we will compute a delay for
the falling transition DF.

239
00:17:51,000 --> 00:17:55,000
Remember, that this is the
input that falls down sharply.

240
00:17:55,000 --> 00:18:01,000
The intermediate node B rises
much more slowly.

241
00:18:01,000 --> 00:18:05,000
And because this rises much
more slowly this guy here falls

242
00:18:05,000 --> 00:18:10,000
a little after this transition
here, and so there is a delay.

243
00:18:10,000 --> 00:18:14,000
And I am going to apply what we
have learned so far and do an

244
00:18:14,000 --> 00:18:18,000
example for you and figure out
what that delay is.

245
00:18:18,000 --> 00:18:22,000
This is an absolute
foundational calculation done in

246
00:18:22,000 --> 00:18:26,000
building digital circuits all
the time.

247
00:18:26,000 --> 00:18:29,000
It is remarkable that something
so simple is used in designing

248
00:18:29,000 --> 00:18:33,000
even the most complex of
circuits to obtain very quick

249
00:18:33,000 --> 00:18:37,000
ideas of what my delay will look
like when I have some subcircuit

250
00:18:37,000 --> 00:18:39,000
driving some other piece of
subcircuit.

251
00:18:39,000 --> 00:18:42,000
Let me just draw a few
equivalent circuits for you.

252
00:18:42,000 --> 00:18:46,000
The internal circuit looks like
this.

253
00:18:51,000 --> 00:18:57,000
This is my inverter X,
A, my node B.

254
00:18:57,000 --> 00:19:05,000
And notice that I have this
capacitor CGS.

255
00:19:05,000 --> 00:19:09,000
Since I am interested in this
node, let me show you that,

256
00:19:09,000 --> 00:19:13,000
this capacitor explicitly,
it is because of this capacitor

257
00:19:13,000 --> 00:19:18,000
here that arises because of this
MOSFET here between the gate and

258
00:19:18,000 --> 00:19:22,000
the source.
And that capacitor gives rise

259
00:19:22,000 --> 00:19:24,000
to this RC thing that we are
seeing.

260
00:19:24,000 --> 00:19:28,000
This is RL, this is RL,
VS, VS.

261
00:19:28,000 --> 00:19:32,000
And let's say,
just as up there,

262
00:19:32,000 --> 00:19:40,000
at time T=0 I get a transition
like so, a falling transition

263
00:19:40,000 --> 00:19:46,000
from say 5 volts to 0 volts at
the node A.

264
00:19:46,000 --> 00:19:51,000
This is VA here.
That is shown up there.

265
00:19:51,000 --> 00:19:54,000
And VB --

266
00:20:03,000 --> 00:20:07,000
We had expected that VB would
look like this.

267
00:20:07,000 --> 00:20:12,000
We expected VB to be
instantaneous and looking like

268
00:20:12,000 --> 00:20:18,000
that, but instead because of the
capacitor VB looks like this.

269
00:20:18,000 --> 00:20:22,000
And remember,
again, this is of the form

270
00:20:22,000 --> 00:20:25,000
1-e^-t/RC.
And we will write down the

271
00:20:25,000 --> 00:20:31,000
answers by inspection.
From this let me draw the

272
00:20:31,000 --> 00:20:39,000
connection to circuit delay by
showing you another little graph

273
00:20:39,000 --> 00:20:44,000
here t, VB, zero.
And what I am going to show

274
00:20:44,000 --> 00:20:50,000
you, this is 5 volts.
And so the output goes like

275
00:20:50,000 --> 00:20:54,000
this from close to zero to 5
volts.

276
00:20:54,000 --> 00:20:59,000
It is close to zero.
Because, at least with the

277
00:20:59,000 --> 00:21:03,000
inverters we have been seeing in
lab and so on,

278
00:21:03,000 --> 00:21:06,000
the RON for the inverter is
very, very small compared RL.

279
00:21:06,000 --> 00:21:09,000
So it is virtually zero down
here.

280
00:21:09,000 --> 00:21:12,000
And so what is the delay?
I mentioned there are two

281
00:21:12,000 --> 00:21:15,000
delays of interest.
One is the rising delay.

282
00:21:15,000 --> 00:21:19,000
That is the logical value at
the end, if I wait a long enough

283
00:21:19,000 --> 00:21:23,000
period of time,
is a logical one.

284
00:21:23,000 --> 00:21:28,000
Delay is simply defined as
starting from here how long does

285
00:21:28,000 --> 00:21:32,000
this output take to get to a
valid one?

286
00:21:32,000 --> 00:21:38,000
At what voltage here can I say
that this transition corresponds

287
00:21:38,000 --> 00:21:42,000
to a logical one?
At what voltage here can I say

288
00:21:42,000 --> 00:21:45,000
that that represents a valid
one?

289
00:21:45,000 --> 00:21:47,000
Any ideas?
Yes.

290
00:21:47,000 --> 00:21:50,000
It depends on the discipline,
bingo.

291
00:21:50,000 --> 00:21:53,000
So it depends on the
discipline.

292
00:21:53,000 --> 00:22:00,000
Now let's get more specific.
Since it depends on the

293
00:22:00,000 --> 00:22:06,000
discipline, at what value based
on something in the discipline

294
00:22:06,000 --> 00:22:10,000
can I say this thing is a
logical one?

295
00:22:10,000 --> 00:22:15,000
This is an output remember.
VOH, bingo.

296
00:22:15,000 --> 00:22:20,000
There is some VOH somewhere.
And it takes some amount of

297
00:22:20,000 --> 00:22:27,000
time to get to a valid logical
one output, ergo there is your

298
00:22:27,000 --> 00:22:29,000
delay.
This is tR.

299
00:22:29,000 --> 00:22:36,000
And I call this the rising
delay of the inverter X.

300
00:22:36,000 --> 00:22:40,000
It is interesting that the
rising delay of inverter X,

301
00:22:40,000 --> 00:22:45,000
based on our model,
depends on the parameters of

302
00:22:45,000 --> 00:22:50,000
this inverter and the parameters
of whatever it is driving.

303
00:22:50,000 --> 00:22:55,000
So remember that the delay is
not necessarily just the

304
00:22:55,000 --> 00:23:02,000
property of the inverter itself,
but it depends on the context.

305
00:23:02,000 --> 00:23:05,000
If I stick my inverter before
another inverter like this,

306
00:23:05,000 --> 00:23:09,000
it is the capacitance on that
inverter by our model that tells

307
00:23:09,000 --> 00:23:13,000
me what the delay is going to
look like, of course in addition

308
00:23:13,000 --> 00:23:15,000
to RL.
And we will do the math in a

309
00:23:15,000 --> 00:23:17,000
few seconds.
By the same token,

310
00:23:17,000 --> 00:23:21,000
if I had this wire connecting
not to one inverter but going to

311
00:23:21,000 --> 00:23:24,000
ten other inverters,
I expect to have a capacitance

312
00:23:24,000 --> 00:23:27,000
equal to ten times CGS.
And so therefore this thing

313
00:23:27,000 --> 00:23:31,000
should rise even more slowly,
correct?

314
00:23:31,000 --> 00:23:35,000
The more capacitance on here
the slower it rises up.

315
00:23:35,000 --> 00:23:37,000
Simple.
If I put more and more load on

316
00:23:37,000 --> 00:23:42,000
this line by putting more and
more MOSFETs on that line,

317
00:23:42,000 --> 00:23:45,000
more and more inverters this
will rise slower.

318
00:23:45,000 --> 00:23:50,000
In our example I just have one,
so let's go ahead and compute

319
00:23:50,000 --> 00:23:53,000
the delay.
This is called the rising delay

320
00:23:53,000 --> 00:23:56,000
of X.
That says that for this node

321
00:23:56,000 --> 00:23:59,000
here to go from its output value
to a valid one,

322
00:23:59,000 --> 00:24:04,000
which is VOH how long does it
take?

323
00:24:04,000 --> 00:24:09,000
Notice that if this capacitor
was zero then you would have

324
00:24:09,000 --> 00:24:11,000
seen an instantaneous
transition.

325
00:24:11,000 --> 00:24:17,000
If you have an instantaneous
transition then notice that the

326
00:24:17,000 --> 00:24:21,000
rising delay was zero.
That was the model we had

327
00:24:21,000 --> 00:24:25,000
looked at up until learning
about capacitors.

328
00:24:25,000 --> 00:24:30,000
So let's go ahead and compute
the number.

329
00:24:30,000 --> 00:24:34,000
I can draw an equivalent
circuit for computing a rising

330
00:24:34,000 --> 00:24:37,000
delay.
The equivalent circuit for the

331
00:24:37,000 --> 00:24:40,000
rising delay looks like the
following.

332
00:24:40,000 --> 00:24:44,000
The VS voltage source,
with a resistor RL and a

333
00:24:44,000 --> 00:24:48,000
capacitor CGS,
because when I turn this guy

334
00:24:48,000 --> 00:24:53,000
off, this guy has gone off,
and so as far as the rise time

335
00:24:53,000 --> 00:24:57,000
of this node is concerned I can
look at this circuit,

336
00:24:57,000 --> 00:25:04,000
ground through CGS through RL
through VS back to ground.

337
00:25:04,000 --> 00:25:07,000
And just for simplicity,
let me draw this in a form that

338
00:25:07,000 --> 00:25:09,000
we understand.

339
00:25:13,000 --> 00:25:16,000
CGS.
Let me use this as my ground

340
00:25:16,000 --> 00:25:20,000
node.
And this is the voltage VB.

341
00:25:20,000 --> 00:25:25,000
And this is RL.
And V is simply VS once that

342
00:25:25,000 --> 00:25:31,000
transition happens.
My other equations here,

343
00:25:31,000 --> 00:25:33,000
VI=VS.
And what is VB(0)?

344
00:25:33,000 --> 00:25:38,000
VB(0) is at what value does
this node start out?

345
00:25:38,000 --> 00:25:44,000
Notice that for simplicity here
if this RON is much,

346
00:25:44,000 --> 00:25:49,000
much smaller than RL,
then this node would be very

347
00:25:49,000 --> 00:25:54,000
close to ground.
So I will just go ahead and say

348
00:25:54,000 --> 00:25:59,000
that VB at T=0 is approximately
zero.

349
00:25:59,000 --> 00:26:04,000
And then what I want to find
out is what does the value look

350
00:26:04,000 --> 00:26:09,000
like for time starting from zero
and then going forward?

351
00:26:09,000 --> 00:26:13,000
Well, we have become experts at
this now.

352
00:26:18,000 --> 00:26:21,000
Let's do the intuition here.
Start off with zero.

353
00:26:21,000 --> 00:26:24,000
That's good.
Because my initial value is

354
00:26:24,000 --> 00:26:29,000
zero, I start off here.
What is the final value?

355
00:26:29,000 --> 00:26:34,000
After a long time,
since this is a DC voltage,

356
00:26:34,000 --> 00:26:40,000
what would be the value at VB
after a long time?

357
00:26:40,000 --> 00:26:42,000
Pardon?
VS.

358
00:26:42,000 --> 00:26:48,000
If I wait long enough then it
is going to be at VS.

359
00:26:48,000 --> 00:26:53,000
This is greater than the
initial value,

360
00:26:53,000 --> 00:27:00,000
so we're done.
That is my 1-e^-t/RC form.

361
00:27:00,000 --> 00:27:05,000
It took me three seconds there.
It's pretty cool.

362
00:27:05,000 --> 00:27:10,000
We could add the expression for
this.

363
00:27:10,000 --> 00:27:16,000
And the expression was I take
my starting value,

364
00:27:16,000 --> 00:27:20,000
which is zero,
and I add to that this

365
00:27:20,000 --> 00:27:26,000
difference VS and I multiply
that by this form.

366
00:27:26,000 --> 00:27:31,000
There we go.
And remember I get this from

367
00:27:31,000 --> 00:27:35,000
that rising form up here.
V0=0, this is zero,

368
00:27:35,000 --> 00:27:39,000
so it is simply VI times that,
and VI=VS.

369
00:27:39,000 --> 00:27:43,000
I really would like you to get
this intuition.

370
00:27:43,000 --> 00:27:48,000
If I had two choices,
one is that you understand the

371
00:27:48,000 --> 00:27:54,000
intuition and are able to sketch
that versus in your sleep be

372
00:27:54,000 --> 00:28:01,000
able to solve the differential
equation and get to the answer.

373
00:28:01,000 --> 00:28:07,000
I would much rather you get the
intuition, if it is one or the

374
00:28:07,000 --> 00:28:10,000
other.
It is very simple.

375
00:28:10,000 --> 00:28:14,000
Start off at zero,
I go chuck, and boom,

376
00:28:14,000 --> 00:28:18,000
I get to VS and this is my
1-e^-t/RC form.

377
00:28:18,000 --> 00:28:23,000
I need to compute tR.
And tR is the time that this

378
00:28:23,000 --> 00:28:27,000
takes to get to VOH.

379
00:28:36,000 --> 00:28:53,000
For what value of time,
for what T, does VB reach VOH?

380
00:28:53,000 --> 00:29:01,000
I want to find tR.
What's tR?

381
00:29:01,000 --> 00:29:05,000
From that equation,
that simply tells me the

382
00:29:05,000 --> 00:29:10,000
trajectory of VB as a function
of time.

383
00:29:10,000 --> 00:29:16,000
And so I need to find out what
is T for which VB is VOH?

384
00:29:16,000 --> 00:29:22,000
I write VOH=VS (1-e^-t/RC).
So after a rise time my output

385
00:29:22,000 --> 00:29:28,000
is going to be VOH.
And so let me go ahead and find

386
00:29:28,000 --> 00:29:31,000
tR.
Let's see.

387
00:29:31,000 --> 00:29:37,000
I bring this to this left-hand
side and divide VOH by VS,

388
00:29:37,000 --> 00:29:43,000
and then I move things around
and what I end up getting is

389
00:29:43,000 --> 00:29:49,000
-tR/RC and on the other side I
get ln(1-VOH/VS).

390
00:29:49,000 --> 00:29:52,000
Divide VOH by VS,
that is this,

391
00:29:52,000 --> 00:30:00,000
move this to the other side,
and move e^-t/RC to this side.

392
00:30:00,000 --> 00:30:05,000
And take logarithms on both
sides.

393
00:30:05,000 --> 00:30:11,000
This is what I get.
tR is therefore -RLCGS

394
00:30:11,000 --> 00:30:16,000
ln(1-VOH/VS).
That is my rise time.

395
00:30:16,000 --> 00:30:21,000
You can just do this by
inspection.

396
00:30:21,000 --> 00:30:30,000
It is just so awfully simple.
Just to give to some intuition

397
00:30:30,000 --> 00:30:38,000
with numbers and so on.
Let's say that RL=1K,

398
00:30:38,000 --> 00:30:41,000
VS=5 volts, VOH=4 volts,
CGS=0.1 pF.

399
00:30:41,000 --> 00:30:47,000
This happens so often that we
often time call it "puff".

400
00:30:47,000 --> 00:30:51,000
0.1 puff.
It is pF, it's called puff.

401
00:30:51,000 --> 00:30:55,000
If it is nF,
I don't know why they didn't

402
00:30:55,000 --> 00:31:01,000
call it "nuff".
They just call it nanofarads.

403
00:31:01,000 --> 00:31:08,000
TR for these numbers gets to be
one times ten to the three times

404
00:31:08,000 --> 00:31:14,000
point one times ten to the minus
twelve for pico-farads

405
00:31:14,000 --> 00:31:19,000
ln(1-4/5).
And if you do the math you get

406
00:31:19,000 --> 00:31:26,000
this down to 0.16 nanoseconds.
This means that if I had an

407
00:31:26,000 --> 00:31:33,000
inverter like that droving
another inverter then my output

408
00:31:33,000 --> 00:31:40,000
transition would be delayed by
0.16 nanoseconds.

409
00:31:40,000 --> 00:31:45,000
Trust me, when Intel builds
microprocessors or when Broadcom

410
00:31:45,000 --> 00:31:50,000
builds its cable modem chips,
they have to do this one way or

411
00:31:50,000 --> 00:31:56,000
the other using a computer tool
or by hand for virtually every

412
00:31:56,000 --> 00:32:03,000
little subcircuit in their chip.
That is how you get the delays

413
00:32:03,000 --> 00:32:09,000
or some approximation thereof.
What I want you also to do is,

414
00:32:09,000 --> 00:32:15,000
for no particular reason,
I will just compute for you the

415
00:32:15,000 --> 00:32:20,000
following quantity RLCGS.
The time constant of that

416
00:32:20,000 --> 00:32:26,000
circuit for no reason at all.
I am just going to compute it

417
00:32:26,000 --> 00:32:31,000
and stick it here.
And RLCGS 1 K times 1 pF is

418
00:32:31,000 --> 00:32:37,000
simply 0.1 nanoseconds.
I am just writing it and

419
00:32:37,000 --> 00:32:42,000
sticking it there for no
particular reason.

420
00:32:42,000 --> 00:32:46,000
The next step let's do the
falling delay,

421
00:32:46,000 --> 00:32:49,000
DF.
That is the rising delay.

422
00:32:49,000 --> 00:32:54,000
And, although I didn't show
this to you in the demo,

423
00:32:54,000 --> 00:33:01,000
there is a corresponding delay
of the fall time.

424
00:33:01,000 --> 00:33:05,000
It doesn't fall instantly,
but rather it falls rather

425
00:33:05,000 --> 00:33:08,000
slowly.
Let's draw the equivalent

426
00:33:08,000 --> 00:33:11,000
circuit for when the node X
falls.

427
00:33:11,000 --> 00:33:16,000
Notice that in my inverters
here, this node starts off being

428
00:33:16,000 --> 00:33:17,000
at VS.
This is high.

429
00:33:17,000 --> 00:33:21,000
And this is going to fall
because when I turn this

430
00:33:21,000 --> 00:33:26,000
transistor on it is going to
pull this node to ground or it

431
00:33:26,000 --> 00:33:32,000
is going to fall down.
And what is the equivalent

432
00:33:32,000 --> 00:33:35,000
circuit?
The equivalent circuit is that

433
00:33:35,000 --> 00:33:38,000
ground through capacitor to this
node.

434
00:33:38,000 --> 00:33:42,000
At this node I have RON
connecting to ground and I have

435
00:33:42,000 --> 00:33:45,000
RL connecting to ground through
VS.

436
00:33:45,000 --> 00:33:48,000
Let me draw that little circuit
for you.

437
00:33:48,000 --> 00:33:52,000
Remember life begins and ends
on storage elements,

438
00:33:52,000 --> 00:33:56,000
so I will draw them first.
My storage element CGS.

439
00:33:56,000 --> 00:34:01,000
That is VB.
And, as I said,

440
00:34:01,000 --> 00:34:07,000
this is node X,
it goes from RON to ground,

441
00:34:07,000 --> 00:34:15,000
and it also goes through RL
through VS to ground.

442
00:34:15,000 --> 00:34:23,000
And in this particular
situation VB of zero for the

443
00:34:23,000 --> 00:34:29,000
following delay,
VB starts off at VS so VB of

444
00:34:29,000 --> 00:34:35,000
zero is VS.
And the final output I am not

445
00:34:35,000 --> 00:34:39,000
sure yet.
What is the final value of the

446
00:34:39,000 --> 00:34:44,000
voltage at this node?
I don't know that yet.

447
00:34:44,000 --> 00:34:49,000
I need to compute that.
So what I will do is whenever

448
00:34:49,000 --> 00:34:54,000
you see something like this,
a capacitor connecting to

449
00:34:54,000 --> 00:34:58,000
linear stuff,
or a nonlinear element

450
00:34:58,000 --> 00:35:03,000
connecting to linear stuff.
For no apparent reason you

451
00:35:03,000 --> 00:35:05,000
should at least think about
what?

452
00:35:05,000 --> 00:35:07,000
Think Thevenin,
exactly.

453
00:35:07,000 --> 00:35:11,000
And then see if you can use the
Thevenin method to simplify your

454
00:35:11,000 --> 00:35:13,000
life.
Capacitor, a bunch of stuff

455
00:35:13,000 --> 00:35:16,000
here, I need to find out the
initial value.

456
00:35:16,000 --> 00:35:18,000
Oh, I know that.
That is VS.

457
00:35:18,000 --> 00:35:20,000
Done.
I need to find the final value

458
00:35:20,000 --> 00:35:23,000
using my intuitive method.
For the final value,

459
00:35:23,000 --> 00:35:27,000
I could do it just by looking
at this, but I wanted to throw

460
00:35:27,000 --> 00:35:32,000
in Thevenin.
Hey, let me try to the Thevenin

461
00:35:32,000 --> 00:35:37,000
equivalent and see if that makes
my life any easier.

462
00:35:37,000 --> 00:35:40,000
VTH.
The Thevenin method says that

463
00:35:40,000 --> 00:35:45,000
you can replace this circuit
here with a Thevenin equivalent

464
00:35:45,000 --> 00:35:50,000
of the sort for the purpose of
determining what happens at this

465
00:35:50,000 --> 00:35:54,000
node given that that is linear.

466
00:36:02,000 --> 00:36:08,000
So I need to find out that for
the purpose of determining what

467
00:36:08,000 --> 00:36:14,000
happens at the node X.
I have to replace this with its

468
00:36:14,000 --> 00:36:19,000
Thevenin equivalent.
And I now need to find out RTH

469
00:36:19,000 --> 00:36:23,000
and VTH.
So I get RTH by looking in

470
00:36:23,000 --> 00:36:30,000
here, shorting this guy and
looking at the resistance.

471
00:36:30,000 --> 00:36:33,000
So I look in like this,
then I short this guy here and

472
00:36:33,000 --> 00:36:37,000
I get RL in parallel with RON
because this one shorts to

473
00:36:37,000 --> 00:36:40,000
ground.
So RTH is simply RL in parallel

474
00:36:40,000 --> 00:36:43,000
with RON.
This is a convenient notation

475
00:36:43,000 --> 00:36:45,000
for RL being in parallel with
RON.

476
00:36:45,000 --> 00:36:48,000
And you all know the value of
that.

477
00:36:48,000 --> 00:36:52,000
It is another one of our very
simple patterns like voltage

478
00:36:52,000 --> 00:36:55,000
divider and so on.
Resistances in parallel can be

479
00:36:55,000 --> 00:37:00,000
computed as RL RON divided by RL
plus RON.

480
00:37:00,000 --> 00:37:05,000
What is VTH?
VTH is the open circuit voltage

481
00:37:05,000 --> 00:37:10,000
here.
If I take out this capacitor,

482
00:37:10,000 --> 00:37:15,000
I want to find out what the
voltage here is.

483
00:37:15,000 --> 00:37:22,000
Ah-ha, voltage divider.
VS, the voltage divider here,

484
00:37:22,000 --> 00:37:28,000
RL and RON.
I could write this down as VS

485
00:37:28,000 --> 00:37:34,000
times RON/(RL+RON).
Remember you will see again and

486
00:37:34,000 --> 00:37:37,000
again and again and again in
6.002 or any circuit stuff that

487
00:37:37,000 --> 00:37:40,000
you do, you will see them all
over Thevenin.

488
00:37:40,000 --> 00:37:42,000
Voltage dividers,
current dividers,

489
00:37:42,000 --> 00:37:45,000
resistances in series,
resistances in parallel,

490
00:37:45,000 --> 00:37:49,000
RC thing-a-ma-jigs like this.
So if you just remember those

491
00:37:49,000 --> 00:37:53,000
10 to 15 intuitive patterns then
you are pretty much set for

492
00:37:53,000 --> 00:37:55,000
life.
It just comes on again and

493
00:37:55,000 --> 00:37:57,000
again and again.
Parallel resistors.

494
00:37:57,000 --> 00:38:03,000
Voltage dividers.
You should be able to write

495
00:38:03,000 --> 00:38:07,000
down a voltage divider in your
sleep.

496
00:38:07,000 --> 00:38:12,000
So this is what I have.
Let me now write down

497
00:38:12,000 --> 00:38:19,000
intuitively what I expect the
node X to do just by inspection.

498
00:38:19,000 --> 00:38:24,000
Let's see.
What is the initial value of

499
00:38:24,000 --> 00:38:31,000
the voltage across the
capacitor, intuitive method?

500
00:38:31,000 --> 00:38:34,000
This is how Professor Perreault
would do it, remember?

501
00:38:34,000 --> 00:38:38,000
He would start off by saying
ah-ha, initial value is VS

502
00:38:38,000 --> 00:38:42,000
because I am told it is VS.
I start off with VS.

503
00:38:42,000 --> 00:38:46,000
And so I start off here.
What is the value after a long,

504
00:38:46,000 --> 00:38:48,000
long time based on this circuit
here?

505
00:38:48,000 --> 00:38:51,000
V Thevenin.
After a long time this is a DC

506
00:38:51,000 --> 00:38:54,000
voltage because that is a DC
voltage.

507
00:38:54,000 --> 00:39:00,000
The capacitor looks like an
open circuit after a long time.

508
00:39:00,000 --> 00:39:05,000
And VTH appears there so it is
simply V Thevenin.

509
00:39:11,000 --> 00:39:15,000
And then when you see those
two, boy, I love doing this,

510
00:39:15,000 --> 00:39:18,000
you go like this.
That is the coolest part.

511
00:39:18,000 --> 00:39:21,000
And then I am done.
It is so simple.

512
00:39:21,000 --> 00:39:25,000
Three seconds or less,
I am able to tell you what the

513
00:39:25,000 --> 00:39:28,000
delay of an inverter is purely
by intuition,

514
00:39:28,000 --> 00:39:33,000
completely intuitively.
I mean I haven't done any

515
00:39:33,000 --> 00:39:36,000
solving.
It is just by observation.

516
00:39:36,000 --> 00:39:39,000
Took this circuit,
made my life easy,

517
00:39:39,000 --> 00:39:44,000
Thevenin, looked at RTH,
VTH and then sketched it by

518
00:39:44,000 --> 00:39:47,000
inspection.
Again, if you find that things

519
00:39:47,000 --> 00:39:51,000
are really, really,
really simple don't be

520
00:39:51,000 --> 00:39:54,000
surprised.
Once you get some conceptual

521
00:39:54,000 --> 00:40:00,000
understanding things are indeed
very simple.

522
00:40:00,000 --> 00:40:05,000
You can eliminate a lot of math
just by staring at things

523
00:40:05,000 --> 00:40:08,000
attempting to build up the
intuition.

524
00:40:08,000 --> 00:40:14,000
As a next step what I can do is
write down the expression for

525
00:40:14,000 --> 00:40:17,000
VB.
And I write down the expression

526
00:40:17,000 --> 00:40:21,000
from a falling transition.
How do I do it?

527
00:40:21,000 --> 00:40:23,000
What was it?
What is the method?

528
00:40:23,000 --> 00:40:27,000
I take the lowest value of
interest here.

529
00:40:27,000 --> 00:40:32,000
That is VTH.
And then I add to that this

530
00:40:32,000 --> 00:40:35,000
difference decaying
exponentially.

531
00:40:35,000 --> 00:40:39,000
And that difference is simply
VS-VTH.

532
00:40:39,000 --> 00:40:45,000
And that decays exponentially.
This form is the e^-t/RC form.

533
00:40:45,000 --> 00:40:49,000
And, boom, I am done.
Many of you are wondering,

534
00:40:49,000 --> 00:40:53,000
Professor Agarwal,
if life was so simple,

535
00:40:53,000 --> 00:40:58,000
why on earth did you have us
mess around with those

536
00:40:58,000 --> 00:41:03,000
differential equations to get
here?

537
00:41:03,000 --> 00:41:06,000
You show us differential
equations and then you don't use

538
00:41:06,000 --> 00:41:09,000
them anymore.
Well, that is a good question.

539
00:41:09,000 --> 00:41:12,000
The answer to that is that you
need to understand the

540
00:41:12,000 --> 00:41:14,000
foundations.
Once you understand the

541
00:41:14,000 --> 00:41:18,000
foundations you can find
simplifying techniques to get to

542
00:41:18,000 --> 00:41:21,000
where you need to be,
but you need to understand the

543
00:41:21,000 --> 00:41:24,000
foundations.
You need to at least see why

544
00:41:24,000 --> 00:41:28,000
things are the way they are at
least once.

545
00:41:28,000 --> 00:41:34,000
Understand the foundations and
then find intuitive ways of

546
00:41:34,000 --> 00:41:39,000
getting your answers.
So now my falling delay here

547
00:41:39,000 --> 00:41:45,000
is, I start off with VOS and I
need to get all the way down to

548
00:41:45,000 --> 00:41:50,000
what value to compute.
At some point here,

549
00:41:50,000 --> 00:41:55,000
this is a valid one,
at some point VB becomes a

550
00:41:55,000 --> 00:42:02,000
valid zero for the output.
And that is when I stop my tF

551
00:42:02,000 --> 00:42:06,000
block.
What is the value here for this

552
00:42:06,000 --> 00:42:11,000
to be a valid zero?
Don't all yell at once.

553
00:42:11,000 --> 00:42:16,000
VOL.
I simply had to figure out what

554
00:42:16,000 --> 00:42:20,000
is the value of time,
this is Page 7,

555
00:42:20,000 --> 00:42:27,000
for which this expression
decays down to VOL.

556
00:42:27,000 --> 00:42:38,000
So it is VTH+(VS-VTH) e^-tF/RC.
Then I simplify this.

557
00:42:38,000 --> 00:42:44,000
How do I do that?
VOL-VTH.

558
00:42:44,000 --> 00:42:53,000
Then I divide that by VS-VTH.
So VOL-VTH.

559
00:42:53,000 --> 00:43:05,000
Divide that by VS-VTH.
Take logarithms on both sides

560
00:43:05,000 --> 00:43:14,000
and then multiply by RC.
So I get tF is -RC log of that.

561
00:43:14,000 --> 00:43:20,000
This is R Thevenin and this is
CGS.

562
00:43:20,000 --> 00:43:30,000
How did I get this?
VOL-VTH divided by VS-VTH.

563
00:43:30,000 --> 00:43:37,000
Take logs on both sides.
And then multiply throughout by

564
00:43:37,000 --> 00:43:41,000
-1/-RC and I get my tF.
Done.

565
00:43:41,000 --> 00:43:50,000
Let's do it for the same set
numbers, just that we add an RON

566
00:43:50,000 --> 00:43:55,000
of 10 ohms.
I will do this for RON of 10

567
00:43:55,000 --> 00:44:02,000
ohms and compute the value for
you.

568
00:44:02,000 --> 00:44:06,000
tF=-RTH.
RTH is RON parallel RL.

569
00:44:06,000 --> 00:44:11,000
This is 10 ohms.
That is 1K.

570
00:44:11,000 --> 00:44:20,000
So 10 ohms in parallel with 1K
is approximately 10 ohms.

571
00:44:20,000 --> 00:44:26,000
So let me just use
approximately 10 ohms.

572
00:44:26,000 --> 00:44:33,000
1 pF, that is RC times ln of
VOL.

573
00:44:33,000 --> 00:44:39,000
Oh, I need to give you a VOL.
Let's say my discipline has VOL

574
00:44:39,000 --> 00:44:43,000
being 1 volt.
And so therefore I end up

575
00:44:43,000 --> 00:44:47,000
getting a VOL-VTH divided by
VS-VTH.

576
00:44:47,000 --> 00:44:51,000
Since RON is much,
much, much smaller than RL,

577
00:44:51,000 --> 00:44:57,000
since RON is 10 ohms and this
is 1K, most of VS will drop

578
00:44:57,000 --> 00:45:02,000
across RL.
This is a hundred times

579
00:45:02,000 --> 00:45:05,000
smaller.
Compared to VOL,

580
00:45:05,000 --> 00:45:07,000
which is 1 volt,
VTH is very,

581
00:45:07,000 --> 00:45:12,000
very small.
VTH will be on the order of

582
00:45:12,000 --> 00:45:18,000
0.05, and so therefore I simply
write down VOL here and say VTH

583
00:45:18,000 --> 00:45:22,000
is approximately zero,
and I get VS-VTH.

584
00:45:22,000 --> 00:45:28,000
This is approximately 5.
So let me just say this is

585
00:45:28,000 --> 00:45:34,000
approximately.
And if you do it you will get

586
00:45:34,000 --> 00:45:38,000
1.6 pico-seconds.
Again, just for fun,

587
00:45:38,000 --> 00:45:45,000
let me write the corresponding
RC time constant for the

588
00:45:45,000 --> 00:45:52,000
circuit, which is RTHCGS.
So RTH is approximately 10 ohms

589
00:45:52,000 --> 00:45:58,000
and CGS is 1 pF,
so this is 1 picosecond.

590
00:46:04,000 --> 00:46:08,000
Now you will understand why I
have been writing this time

591
00:46:08,000 --> 00:46:10,000
constant down.
It turns out that the time

592
00:46:10,000 --> 00:46:13,000
constant is a very,
very important number.

593
00:46:13,000 --> 00:46:17,000
So you see an RC circuit,
and you compute its time

594
00:46:17,000 --> 00:46:21,000
constant for an RLC connection
like this, it is the series

595
00:46:21,000 --> 00:46:25,000
resistance times the capacitor.
The time constant is a very

596
00:46:25,000 --> 00:46:29,000
important number.
And usually the circuit delays

597
00:46:29,000 --> 00:46:34,000
are in the neighborhood of the
time constant value.

598
00:46:34,000 --> 00:46:37,000
In this case this is 1 pS.
That is 1.6 pS.

599
00:46:37,000 --> 00:46:40,000
And in this case we had 0.1 nS
and 0.16 nS.

600
00:46:40,000 --> 00:46:44,000
So the time constant itself is
a good indicator of what your

601
00:46:44,000 --> 00:46:48,000
delays are going to be like.
If you have no time,

602
00:46:48,000 --> 00:46:53,000
you are sloshing your cereal
down in the morning and you need

603
00:46:53,000 --> 00:46:57,000
to know how long the delay of
the inverter very quickly,

604
00:46:57,000 --> 00:47:02,000
you have three seconds.
Just do the RC and that is a

605
00:47:02,000 --> 00:47:06,000
good first approximation.
What I would like to do next in

606
00:47:06,000 --> 00:47:11,000
the last three or four minutes
is set up a little demo for you

607
00:47:11,000 --> 00:47:15,000
for your recitation,
and then your recitation will

608
00:47:15,000 --> 00:47:17,000
cover it.

609
00:47:23,000 --> 00:47:26,000
This is a true story.
This really,

610
00:47:26,000 --> 00:47:29,000
really happened.
In this West Coast school,

611
00:47:29,000 --> 00:47:33,000
which shall remain nameless,
they had a chip,

612
00:47:33,000 --> 00:47:37,000
they built a chip.
And the chip had a bunch of

613
00:47:37,000 --> 00:47:40,000
pins, as you might imagine.
And the pin,

614
00:47:40,000 --> 00:47:44,000
as you have a trace on a board,
a wire on a board there are

615
00:47:44,000 --> 00:47:47,000
some capacitance attached to
wires, between the wire and

616
00:47:47,000 --> 00:47:49,000
ground.
And that is a capacitor.

617
00:47:49,000 --> 00:47:52,000
And they just called it a load
capacitance.

618
00:47:52,000 --> 00:47:56,000
It could have been 0.1 pF or
0.01 pF or something like that.

619
00:47:56,000 --> 00:48:00,000
What they found when they built
this chip --

620
00:48:00,000 --> 00:48:03,000
What they found was that the
voltage here they expected to

621
00:48:03,000 --> 00:48:06,000
look like this,
this computer science

622
00:48:06,000 --> 00:48:09,000
abstraction and so on,
zero to one transition,

623
00:48:09,000 --> 00:48:13,000
boom, it should look like this.
But for the reasons we saw

624
00:48:13,000 --> 00:48:17,000
today the observed transition
was much slower and looked like

625
00:48:17,000 --> 00:48:20,000
this.
So the students said ah-ha,

626
00:48:20,000 --> 00:48:23,000
let's speed up this chip.
We can speed up the chip by

627
00:48:23,000 --> 00:48:27,000
looking at the RL and RON of my
driving inverters.

628
00:48:27,000 --> 00:48:32,000
And if I make RL small --
Notice if I make RL small my

629
00:48:32,000 --> 00:48:36,000
delay is small.
If I make RON small my falling

630
00:48:36,000 --> 00:48:39,000
delay is small.
So let's make really small RLs

631
00:48:39,000 --> 00:48:43,000
and RONs and let's all have fun.
Unfortunately,

632
00:48:43,000 --> 00:48:48,000
what they observed was that by
making RL and RON both small,

633
00:48:48,000 --> 00:48:53,000
the RC time constant small they
expected to see a much sharper

634
00:48:53,000 --> 00:48:56,000
rise time.
And this was the original.

635
00:48:56,000 --> 00:49:01,000
But what really happened was --
They expected this to get

636
00:49:01,000 --> 00:49:05,000
faster and kind of look like
this, but what happened was

637
00:49:05,000 --> 00:49:08,000
disaster struck.
What they observed was

638
00:49:08,000 --> 00:49:11,000
something like that.
This is a real-life story.

639
00:49:11,000 --> 00:49:15,000
And so instead of getting
something like this they go

640
00:49:15,000 --> 00:49:18,000
something like this.
And why is that a problem?

641
00:49:18,000 --> 00:49:22,000
That is a problem because
notice when I expect to be at a

642
00:49:22,000 --> 00:49:26,000
zero, I got some spikes that
went higher than VIL into the

643
00:49:26,000 --> 00:49:30,000
forbidden region and did bad
things to me.

644
00:49:30,000 --> 00:49:33,000
So let me show you a little
demo and show you that that's

645
00:49:33,000 --> 00:49:36,000
exactly how the circuit is
behaving.

646
00:49:43,000 --> 00:49:48,000
Notice that this is what I
expect but this is what I see.

647
00:49:48,000 --> 00:49:54,000
Look at the purple curve here.
Notice these spikes that are

648
00:49:54,000 --> 00:49:57,000
showing up there.
This is true.

649
00:49:57,000 --> 00:50:01,000
They saw it happen.
And why is this happening?

650
00:50:01,000 --> 00:50:06,000
It turns out that what was
happening was that the two pins

651
00:50:06,000 --> 00:50:10,000
were next to each other.
And I will show you a little

652
00:50:10,000 --> 00:50:13,000
demonstration here.
Let's see if you can figure out

653
00:50:13,000 --> 00:50:17,000
why this was happening.
Think of these as two pins and

654
00:50:17,000 --> 00:50:22,000
the pins are close together.
I am just modeling the two pins

655
00:50:22,000 --> 00:50:27,000
with a role of wire.
And what I am going to do is --

656
00:50:33,000 --> 00:50:36,000
I am going to separate the
wires and keep them far apart.

657
00:50:36,000 --> 00:50:39,000
It is like keeping my pins far
apart.

658
00:50:39,000 --> 00:50:42,000
Hey, guess what happened?
Those nasty spikes went away.

659
00:50:42,000 --> 00:50:46,000
But then I cannot keep my pins
1 meter apart on a chip.

660
00:50:46,000 --> 00:50:48,000
Your laptops are going to look
20 yards long.

661
00:50:48,000 --> 00:50:52,000
You want the pins to be very
close to each other so that you

662
00:50:52,000 --> 00:50:56,000
can have many pins on chips and
therefore have very small

663
00:50:56,000 --> 00:50:57,000
systems.
But then look,

664
00:50:57,000 --> 00:51:02,000
I get the spikes.
Any idea why that is happening?

665
00:51:02,000 --> 00:51:06,000
Why is that when the pins are
close together I get those

666
00:51:06,000 --> 00:51:08,000
spikes?
Any ideas?

667
00:51:08,000 --> 00:51:10,000
Somewhat?
We just learned about

668
00:51:10,000 --> 00:51:14,000
capacitors, so this must have to
do with capacitors.

669
00:51:14,000 --> 00:51:18,000
There is this parasitic
capacitor between the pins,

670
00:51:18,000 --> 00:51:20,000
exactly.
Here is what is happening.

671
00:51:20,000 --> 00:51:25,000
Here is what I expect.
I expect a nice square wave at

672
00:51:25,000 --> 00:51:28,000
the output.
But instead I have a pin next

673
00:51:28,000 --> 00:51:31,000
to me.
And I have a faster wave form

674
00:51:31,000 --> 00:51:33,000
driving it.
And so therefore there is a

675
00:51:33,000 --> 00:51:36,000
parasitic capacitor here.
And because of that I get

676
00:51:36,000 --> 00:51:40,000
something called "crosstalk".
And the model for crosstalk is

677
00:51:40,000 --> 00:51:43,000
some resultant resistance with
the parasitic capacitor and I

678
00:51:43,000 --> 00:51:45,000
get those spikes.
And the 6.002 experts saw the

679
00:51:45,000 --> 00:51:48,000
solution.
They said how do we fix this

680
00:51:48,000 --> 00:51:50,000
problem?
6.002 experts said the way we

681
00:51:50,000 --> 00:51:52,000
fix this problem if it is slow
it may be better.

682
00:51:52,000 --> 00:51:56,000
Instead of having sharp
transitions let me drive it with

683
00:51:56,000 --> 00:52:00,000
slower transitions.
Let's switch to the demo again.

684
00:52:00,000 --> 00:52:03,000
You will see this in
recitation, but I will show you

685
00:52:03,000 --> 00:52:06,000
the demo very quickly.
I have a sharp transition of

686
00:52:06,000 --> 00:52:08,000
the input, which is that yellow
thing out there.

687
00:52:08,000 --> 00:52:11,000
I am going to make the
transition slower.

688
00:52:11,000 --> 00:52:14,000
Switch to a triangular wave.
And you will notice the spikes

689
00:52:14,000 --> 00:52:15,000
go away.
Oh, no.

690
00:52:15,000 --> 00:52:18,000
That is the wrong one.
The other one.

691
00:52:18,000 --> 00:52:20,000
There you go.
The moment I switch to a slower

692
00:52:20,000 --> 00:52:22,000
transition boom,
the spikes go away.

693
00:52:22,000 --> 00:52:24,000
You want to switch back to
square?

694
00:52:24,000 --> 00:52:27,000
There you go.
The 6.002 experts saw the

695
00:52:27,000 --> 00:52:30,000
solution.
Slower transitions.

696
00:52:30,000 --> 00:52:33,000
And you will do this example in
detail in Section tomorrow.

697
00:52:33,000 --> 00:52:36,000
Thank you.